中国科技核心期刊

中文核心期刊

CSCD来源期刊

空间控制技术与应用

• 短文 • 上一篇    

一种存储器容错设计方法

赵云富, 华更新   

  1. 北京控制工程研究所,北京100190
  • 收稿日期:1900-01-01 修回日期:1900-01-01 出版日期:2009-06-26 发布日期:2009-06-26

A Method of Fault Tolerant Design for Memory

ZHAO Yunfu, HUA Gengxin   

  1. Beijing Institute of Control Engineering, Beijing 100190,China
  • Received:1900-01-01 Revised:1900-01-01 Online:2009-06-26 Published:2009-06-26

摘要: 空间辐射环境常导致存储器发生单粒子翻转,设计了一种基于Hsiao编码的EDAC电路,并通过编解码电路复用的策略来进一步减小电路面积,该电路与目前广泛应用的扩展Hamming编码相比,面积减少了近50%,速度提高了近20%,并采用了一种新颖的方法来实现单错自动回写功能,可有效解决CPU中断行为。通过增加控制寄存器的三模冗余(TMR)设计来保证存储器操作的正确性,仿真验证了该设计的有效性和优越性。

关键词: 单粒子翻转, 检错纠错码, Hsiao编码, 三模冗余

Abstract: Single Event Upsets (SEU) often occur when a memory works in the space radiation environment. An Hsiao code-based Error Detect and Correct (EDAC) circuit is designed. By reusing the encode and decode circuit, occupied circuit area is decrease further. Compared with the Extended Hamming Code, the area is decreased by nearly 50 percent and the speed is improved by nearly 20 percent in my design. A novelty method to complete auto write-back function for single error is adopted in this paper. A Triple Modular Redundancy (TMR) design for control registers is used to guarantee correct operation of a memory. Simulation results illustrate feasibility and superiority of the proposed design.

Key words: single event upsets, error detect and correct, Hsiao code, triple modular redundancy

中图分类号: 

  • V4